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Underfox
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Underfox3
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Physicist, Telecom Engineering lover, HPC Enthusiast. Prog Rock/Metal fan.
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7.752
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139
Pratim
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1.455
Osobe koje vas prate
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Underfox
@Underfox3
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11 h |
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@Underfox3
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11 h |
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Just do it! 🏴☠️🏴☠️🏴☠️
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@Underfox3
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12 h |
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Jon, the silicon pirate, strikes again!!! twitter.com/jonmasters/sta…
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4. velj |
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Researchers have demonstrated a integrated photonic tensor core, achieving parallelized photonic in-memory computing using phase-change memory arrays and photonic chip-based optical frequency combs, showing a path towards full CMOS wafer-scale integration
arxiv.org/ftp/arxiv/pape… pic.twitter.com/aWDBvAb36n
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4. velj |
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"This work is in part supported by a Google Cloud Platform Research Award. This work is also supported by the U.S.Department of Energy (DOE) under contract number DE-SC0020455."
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4. velj |
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In this paper, researchers have proposed SciChain, a new #blockchain consensus protocol (the proof-of-scalable-traceability) to enable immutable and autonomous data provenance for scientific applications deployed to #HPC systems.
arxiv.org/pdf/2002.00141… pic.twitter.com/4wdTZFiV9V
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4. velj |
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In this paper, researchers have studied some well-known battery draining attacks against edge computing nodes in #IoT networks, showing that certain attacks are able to dramatically increase energy consumption and affect device’s operations.
arxiv.org/pdf/2002.00069… pic.twitter.com/JWUirMAAeo
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4. velj |
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GitHub: github.com/openai/neural-…
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4. velj |
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MIT and Google researchers have presented the technical details of the new implementation of the Neural MMO: a massively multiagent game environment inspired by MMOs for artificial intelligence research. #MachineLearning
arxiv.org/pdf/2001.12004… pic.twitter.com/apitFlCw9s
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4. velj |
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In this keynote, researchers have presented a performance analysis of the @AMD EPYC Rome processors, including molecular dynamics simulation, electronic structure, computational engineering and ocean general circulation model.
Via @ogawa_tter
scd.stfc.ac.uk/SiteAssets/Pag… pic.twitter.com/u94jwpm3E3
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@Underfox3
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3. velj |
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Supplementary information:
static-content.springer.com/esm/art%3A10.1…
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3. velj |
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In this paper, researchers have presented a metagenomic RNA sequencing of WH-Human-1 #coronavirus, showing that the virus was most closely related to a group of SARS-like coronaviruses previously sampled from bats in China.
nature.com/articles/s4158… pic.twitter.com/NuMLnWAeNA
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3. velj |
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It is important to note that conventional electronic computers based on Von Neumann architecture are inherently not powerful enough to solve NP-complete problems efficiently.
Supplementary Materials:
advances.sciencemag.org/content/advanc… pic.twitter.com/C4ENRlHvW4
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3. velj |
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In this paper, researchers have developed a scalable chip built-in photonic computer to efficiently solve the subset sum problem, a typical NP-complete problem. #Photonics #Optics
advances.sciencemag.org/content/6/5/ea… pic.twitter.com/RUZze1C0qr
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@Underfox3
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7. sij |
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In this thread I will highlight some of the works that will be presented in February at ISSCC2020. There are a lot of interesting news on the way... pic.twitter.com/KjRxWYWhue
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3. velj |
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3. velj |
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The experimental results show that TunnelScatter is able to transmit through several walls covering a distance of 18m while consuming a peak biasing power of 57μW.
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3. velj |
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In this paper, researchers have proposed TunnelScatter, a mechanism that uses a tunnel diode to enable low-power communication when the ambient carrier signal is weak or even absent. #IoT
arxiv.org/pdf/2001.04259… pic.twitter.com/cwJIQw2Coi
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3. velj |
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Researchers have proposed a photonic crystal architecture for a DLA which enables simultaneous acceleration of multiple electron beams and has the potential to increase the total beam current by at least one order of magnitude. #photonics
arxiv.org/pdf/2001.09583… pic.twitter.com/cLqJKxOCoY
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3. velj |
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Researchers developed a novel form of FPGA overlays designed to provide flexibility and bare metal performance, showing a improvement up to 20x compared to the baseline FPGA overlays, while achieving over 1.33x higher Fmax than direct FPGA implementation.
arxiv.org/pdf/2001.11886… pic.twitter.com/eOTXh0M0VU
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