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| Santos Merino proslijedio/la je tweet | ||
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SIGARCH
@sigarch
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7. sij |
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Bluespec SystemVerilog will go open source on January 31. bluespec.com/2020/01/06/blu…
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SandboxEscaper
@SandboxBear
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8. sij |
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If a mentally unstable highschool dropout without degrees can get a job at Microsoft, anyone can achieve their dreams. Just got to keep going at it, even if you go half crazy.
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Project Zero Bugs
@ProjectZeroBugs
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9. sij |
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SLOP - A Userspace PAC Workaround bugs.chromium.org/p/project-zero…
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Santos Merino
@santitox
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26. pro |
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Email already sent 📬
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Santos Merino
@santitox
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5. pro |
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My team is looking for people with FPGA development and crypto skillz (bonus points for those with SCA and/or FI experience). Are you interested? DMs are open.
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Flavio Garcia
@halfdoof
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12. stu |
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Eric LaForest
@elaforest
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30. lis |
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I'm writing an online book: "FPGA Design Elements",
which provides a reference library of fundamental digital logic design elements. Think of it as a hardware analog to the C Standard Library ("libc") and its documentation.
fpgacpu.ca/fpga/index.html
github.com/laforest/FPGAD…
#FPGA
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Intel STORM
@IntelSTORMTeam
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23. kol |
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New paper - "Randpoline: A Software Mitigation for Branch Target Injection" @IntelSTORMTeam bit.ly/randpoline @IntelSecurity #WeAreSTORM Thanks for the help in reviewing and amazing discussions @paxteam @grsecurity @epakskape @wildsator @Kekai_Hu @pinkflawd @bsdaemon
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Symbiotic EDA
@symbiotic_eda
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22. kol |
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Emulating SPI-Flash chips with SPIspy for doing secure boot research, done by @qrs , enabled by open source FPGA tools written for @latticesemi FPGAs by the team of @symbiotic_eda @oe1cxw Eddie Hung @fpga_dave @micko_mame streaming.media.ccc.de/camp2019/reliv… pic.twitter.com/itYSaN3mDi
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Brandon Falk
@gamozolabs
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19. kol |
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Sushi Roll: A CPU research kernel with minimal noise for cycle-by-cycle micro-architectural introspection gamozolabs.github.io/metrology/2019…
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Andrea Barisani
@AndreaBarisani
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12. kol |
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We bypassed Encrypt Only mode Secure Boot on Xilinx Zynq UltraScale+ SoCs.
The two identified flaws are design issues which allow secure boot bypass. The 1st one affects the hardware boot ROM and therefore has no mitigation.
github.com/inversepath/ad…
xilinx.com/support/answer… pic.twitter.com/AqjB8S24rN
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Santos Merino
@santitox
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11. kol |
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I would add this one to your list:
i.blackhat.com/USA-19/Thursda…
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Santos Merino
@santitox
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8. kol |
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@hasarfaty Are you planning to upload your bh usa slides?
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Santos Merino
@santitox
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1. kol |
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Can you share more details about the firmware?
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Santos Merino
@santitox
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1. kol |
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Tbh I think I tried myself in the current release and couldn't find them...
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Santos Merino
@santitox
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1. kol |
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Sure, but i am unsure they are included in the most recent release of Intel System Studio. Did you try? The files in my pic were in the directory of the 2018 version
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Dave dwizzzle Weston
@dwizzzleMSFT
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31. srp |
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OP-TEE TrustZone support for OpenEnclaves: github.com/openenclave/op…
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Santos Merino
@santitox
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25. srp |
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May I ask which patent are you talking about?
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Nikolaj Schlej
@NikolajSchlej
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24. srp |
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It took us some serious time, but I've finally got all required official approvals to continue working on UEFITool, huge props to @radian for making that happen.
My first commit since 2016, adding ME region parser and extended ucode header parser: github.com/LongSoft/UEFIT…
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Santos Merino
@santitox
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23. srp |
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TDef decryption script working ☑️
#IntelVISA pic.twitter.com/p1mC3wyi0y
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