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RISC-V
RISC-V is a free and open ISA enabling a new era of processor innovation through open standard collaboration.
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RISC-V 2h
In collaboration with the , the Foundation is hosting a series of free events in September, taking place in Tel Aviv, Munich, Berlin, Tallinn, Paris and London. Register now to learn about innovative RISC-V implementations:
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RISC-V 19h
If you’re in San Francisco, check out tonight's In Rust We Trust Meetup. The event will include a talk about the CKB VM built on top of to create a flexible, programmable blockchain. Learn more:
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RISC-V 22h
We want to hear your ideas! Submit to speak at the Summit, taking place Dec. 9-12 in San Jose, Calif. The entry deadline is July 22 so get your submission in soon.
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RISC-V Jul 17
We’re launching the RISC-V Soft CPU Contest, sponsored by and , to advance the development of more robust security solutions. Get the details and learn how you can enter:
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RISC-V Jul 17
. spoke with , interim director of the , to discuss how the Alliance aims to “collaboratively create hardware and open source development tools for the masses.”
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RISC-V Jul 16
Want to speak at the biggest event of the year, the Summit? The event is taking place Dec. 9-12 in San Jose. Don’t miss your chance, submit your entry by July 22:
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RISC-V retweeted
Ted Marena Jul 11
affords Western Digital the ability to innovate centric solutions for
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RISC-V Jul 15
Replying to @TzachiNoy
Hi Tzachi, this page at GitHub outlines the security attacks and has some more details about the contest: .
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SiFive Jul 15
The Tech Symposia is on to its next leg two weeks from today! Check out our Delhi/Noida agenda here:
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RISC-V Jul 15
The @risv_v Foundation announced the ratification of the base ISA and privileged architecture specifications. Check out ’s article for more details via :
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RISC-V Jul 15
The Foundation officially announced the call for submissions for the RISC-V Soft CPU Contest to develop a solution that can thwart malicious attacks. Check out how you can enter:
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RISC-V Jul 12
. Foundation CEO will be giving a keynote at the Open Source Summit Japan on July 19. Check out this post for more info:
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RISC-V Jul 12
The deadline for the Summit call for papers has been extended to July 22. Submit your speaking proposal today for a chance to participate in the biggest event of the year!:
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RISC-V Jul 11
Arne Verheyde of provides a deep dive on ’s multi-chip module inference research chip. The chip integrates a control processor which configures communication between PEs and global buffers via software-managed registers:
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SiFive Jul 9
Looking to make an impact in your next role? If you'd like to join the RISC-V Revolution, check out our job openings at
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RISC-V Jul 11
Read about ’s GAP8 IoT Application Processor and GAPPoc proof of concept boards for edge AI at :
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RISC-V Jul 10
. has donated $5,000 to the Foundation to advance the ecosystem and efforts focused on open source hardware and software development. Learn more:
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Bharat Innovation Fund Jul 8
🌟 Nearly a decade ago, built an infrastructure for public goods, now lauded globally! Now it's time for 'Shakti’ – India’s first with software, customization & support infrastructure to disrupt the technology world! (1/2)
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Dan Mandell Jul 9
. and Announce Strategic Partnership for Based Root-of-Trust IP Solutions Joining Silex Insight’s eSecure IP Module + AndesCore N22 for , , and communication
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RISC-V retweeted
SiFive Jul 3
Last week, published a great piece on featuring SiFive CEO ! Explore the article to see Naveed's insight on the future of RISC-V:
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