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Mahesh Venkitachalam Oct 9
Have to do this because the led on the lattice ice40 board is blindingly bright...
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Vrom 19h
Thank you Eric Hop [] for the update about progress! "The goal is to deploy the project this year" 👀
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Sebastien Andrivet Oct 11
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No Mans Land Oct 13
Donkey Kong Junior Arcade ported to MiSTer by gaz68. Thank you gaz68!!
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Hastlayer Oct 11
Hastlayer started working on the Project Catapult platform! One sample converted to hardware is 9x faster than on the 64-core beast host PC. How cool is that? Release soon!
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Jack McLeans 11h
Finally managed to get microPython running on the RISC-V CPU core, on after a long time of "unable to initialize libusb" Error. Can't forget to mention how clear the documentation is.
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Fork Sand Oct 12
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MicrolabACE Oct 10
We started working on the for the processor we've been working on. Finished the schematic and placement. Starting the toughest part (routing) now.
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OneSpin Solutions 13h
The second part of the technical sessions at today's workshop on the application of FPGAs in NPPs has just started. Among other presentations, our customer Framatome will present how they couple cutting-edge engineering software with controllers for safety applications.
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Faster Technology 6h
Designing FPGAs Using the Vivado Design Suite 1, November 5-6th, Longmont, CO. This course offers introductory training on the Vivado Design Suite and helps you to understand the design flow. More classes at
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MicrolabACE 11h
Replying to @ben_eater
We replaced most of the logic ICs with an since it can easily be used to replace logic ICs. We finally finished the with altium and We will be ordering the soon.
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amidarius Oct 12
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Nachiket Oct 7
Full paper with UW undergrad Harry Chan, and grad Gary Malik accepted to FPT 2019 on "Partitioning FPGA-Optimized Systolic Arrays for Fun and Profit"
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Mahesh Venkitachalam Oct 11
Writing up the first instalment in a marathon project. Interfacing with ultrasonic sensor is interesting - edge detection, Bin to BCD (double dabble), driving a 7 segment display, etc. iCE40UP5k + icestorm toolchain. Sucks that the Lattice board doesn't have a 5V out.
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Electronics SE Oct 12
FPGA starts working after irrelevant changes, why?
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Um Programmer Jammy Oct 11
I am currently looking for a position in embedded systems, software development (C++), and/or VHDL design in the DC/MD/VA area. Please retweet and share with your colleagues and constituents.
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gojimmypi Oct 11
Bus Pirate Ultra! I think this is now at the top of my "most desired gizmos" (well, perhaps behind the ULX3S). A Glasgow competitor? STM32 and iCE40 together for "SPI, I2C, UART, CAN, JTAG debugger" 😍
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zigazou Oct 13
256 bits constants are a bit long :o)
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天 Oğuz Meteer 天 Oct 11
So I've updated to Vivado 2019.1 and the multiple monitor crash bug still is in there, and now the simulator also crashes MUCH more often. So now I have to disable a monitor every few minutes and enable it after Vivado starts up.
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Napatech 7h
Reconfigurable computing fulfills the vision for software-defined networking – learn more here:
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