Twitter | Search | |
ChipEstimate
ChipEstimate.com, the ONLY chip planning portal comprised of over 200 of the world's LARGEST IP suppliers! We have , , , & news!
10,725
Tweets
913
Following
3,162
Followers
Tweets
ChipEstimate 3h
Tensilica HiFi DSP: Isolating sound into bubbles. Get the Featured Tech Talk article from Cadence here>>
Reply Retweet Like
ChipEstimate Jul 19
Michael Young from Cadence and Andrea Casotto from Altair discuss how Cadence and Altair collaborate on emulation to meet the needs for Automotive, AI, Cloud Commuting and more at DAC 2019. Watch the interview here>>
Reply Retweet Like
ChipEstimate Jul 19
Rambus Expands Family of CryptoManager Root of Trust Secure Silicon IP Cores. Learn more>>
Reply Retweet Like
ChipEstimate Jul 19
Avery Design Systems Announces SimRegress and SimCompare. Read more>>
Reply Retweet Like
ChipEstimate Jul 18
Naseer Khan discusses On Chip Monitoring, Optimisation IP, Low Power Applications and more at DAC 2019. Watch here>>
Reply Retweet Like
ChipEstimate Jul 18
Cadence Digital Full Flow Achieves Certification for Samsung Foundry 5LPE Process Technology. Read more>>
Reply Retweet Like
ChipEstimate Jul 18
PLDA Reaches Key Milestone in Gen-Z IP Development, Enables Early Adopters to Start Architecting their Next-Generation SoCs. Read more>>
Reply Retweet Like
ChipEstimate Jul 17
Floriberto Lima from SiliconGate discusses Power Management IP and more at DAC 2019. Watch the interview>>
Reply Retweet Like
ChipEstimate Jul 17
SiFive Expands DesignShare IP Ecosystem to 20 Partner Companies. Learn more>>
Reply Retweet Like
ChipEstimate Jul 17
Cadence Announces First-to-Market DisplayPort 2.0 Verification IP. Cadence VIP drives early adoption of next-generation DisplayPort standard for mobile and automotive applications. Learn more>>
Reply Retweet Like
ChipEstimate Jul 17
SmartDV Adds DisplayPort 2.0 to its Portfolio of Verification IP. New VIP for Popular Video Interface Standard Delivered Quickly Via Proprietary SmartDV Compiler, Talented Engineering Group. Learn more>>
Reply Retweet Like
ChipEstimate Jul 16
Vidatronic Announces New Silicon-Proven Power Management Unit Intellectual Property Core for Samsung Foundry. Read more>>
Reply Retweet Like
ChipEstimate Jul 16
Samsung Accelerates New Product Ramp for 7nm Technology Node Using Synopsys' Yield Explorer. Read more>>
Reply Retweet Like
ChipEstimate Jul 16
Aldo Bottelli from True Circuits presents on DDR 4/3 PHY at DAC 2019. Watch here>>
Reply Retweet Like
ChipEstimate Jul 16
Tensilica HiFi DSP: Isolating sound into bubbles. Get the Featured Tech Talk article from Cadence here>>
Reply Retweet Like
ChipEstimate Jul 15
Omni Design Technologies opens design center in Bangalore, India. Learn more>>
Reply Retweet Like
ChipEstimate Jul 15
Rambus Expands Family of CryptoManager Root of Trust Secure Silicon IP Cores. Read more>>
Reply Retweet Like
ChipEstimate Jul 15
Silvaco Announces Worldwide SURGE Schedule for 2019. Learn more>>
Reply Retweet Like
ChipEstimate Jul 15
Kevin Yee from Samsung discusses advanced process nodes, segment focusing, and more at DAC 2019. Watch the interview here>>
Reply Retweet Like
ChipEstimate Jul 15
NSITEXE Accelerates Delivery of Data Flow Processor IP for Automotive and Industrial Applications Using the Cadence Digital Design Full Flow. Learn more>>
Reply Retweet Like